Set ADB as the default composition for GVM targets, as DIAG
over USB conflicts with the DIAG over IP used by the PVM.
Change-Id: I09389564db284b16ccb34243eaf34bb17860b30f
Signed-off-by: Anant Goel <anantg@codeaurora.org>
- SnapdragonVoiceActivation feature for Far Field Voice version
affines its threads to 0-3 CPUs and so prevent them from isolation
for qcs605 target
Change-Id: I09ef5cc97ee245133315edc0821f3a2afc54e99b
ZRAM compression uses the linux slub allocator its internal data
structures. If these internal data structure consume a lot of memory,
ZRAM compression may increase memory usage, rather than decrease it
as expected. Decrease the chance of this occuring by ensuring the
SLAB_STORE_USER debug option is disabled.
Change-Id: I4684feda94b7bebacb6218b7f979c95771b0ee10
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
check populated dm-* nodes and Update read_ahead_kb
values to them. This is needed because on targets
with verity disabled dm-0 to dm-6 are populated,
while on enabled targets dm-3 to dm-6 are populated.
Change-Id: Ia4e262d7487120695db53b562b5764598fd40a87
This change makes 90DB (interfaces: diag,dun,rmnet,dpl,qdss,adb)
as default usb composition on bengal.
Change-Id: If83a356219f802e8960c7d341296f3a7b3641e68
CDSP subsytem uses rpmsg to send CPU L3 clock requests via cdspl3
governor. Use cdspl3 as the governor for CDSP L3 devfreq node for
serving CDSP L3 clock requests.
Change-Id: I49ad421811affa82458abd34d0a0851e1f1fc423
Adding cases for sdmshrike to enable clocks
for APPS Power collapse.
Change-Id: I089556c1098d60022bdb3de1ec2024858f0d3b30
Signed-off-by: Nitesh Kataria <nkataria@codeaurora.org>
msm_irqbalancer was not starting for many targets. Call to start
irqbalancer was not getting initiated. Fix this by making a
call to start msm_irqbalancer.
Change-Id: I4fbdef032100c91dba7bdb48a3562c5f9ab38e4d
On high RAM targets, due to more anonymous memory availability,
we can improve headroom by increasing ZRAM swap size,
especially under memory pressure, and during background app compact.
Also ZRAM swap size is logical and is used when needed and
shouldn't cause other side effects.
Change-Id: I11949b8bdf16e9b4b8abb1bd633ffa1a1c0b1ad6
CPU BW is set to 200Mhz in QC MTP, since on Pixel, we also adjust CPU BW
in touch PowerHint, we can relax the setting to 100Mhz.
Bug: 69271302
Test: boot
Change-Id: Iead3634d9c6fb0b3edc24ab0a19d62157a6a1793
Unclear if advantages are worth cumulative power draw.
bug 73364974
Test: boot taimen, memlat is powersave
Change-Id: I7b5eb176d0f22281e687b9577f5eedf311fb4a11
All this does is to disable msm_core and set the
polling_interval to 0, which makes the driver useless.
We can achieve the same result by disabling the driver.
Change-Id: Ic19c505ed74811a3d1b76703255af3aa5cb37bf9
Signed-off-by: Davide Garberi <dade.garberi@gmail.com>
Signed-off-by: Subhajeet Muhuri <kenny3fcb@gmail.com>
core_ctl's enable & disable nodes are differnt on different
kernel versions. Fix Disabling of core_ctl for msm8917.
CRs-Fixed: 2366575
Change-Id: Ide7fc5384b34e9e686fe686f9fd70aaaaffcc278
