CDSP subsytem uses rpmsg to send CPU L3 clock requests via cdspl3
governor. Use cdspl3 as the governor for CDSP L3 devfreq node for
serving CDSP L3 clock requests.
Change-Id: I49ad421811affa82458abd34d0a0851e1f1fc423
Adding cases for sdmshrike to enable clocks
for APPS Power collapse.
Change-Id: I089556c1098d60022bdb3de1ec2024858f0d3b30
Signed-off-by: Nitesh Kataria <nkataria@codeaurora.org>
msm_irqbalancer was not starting for many targets. Call to start
irqbalancer was not getting initiated. Fix this by making a
call to start msm_irqbalancer.
Change-Id: I4fbdef032100c91dba7bdb48a3562c5f9ab38e4d
On high RAM targets, due to more anonymous memory availability,
we can improve headroom by increasing ZRAM swap size,
especially under memory pressure, and during background app compact.
Also ZRAM swap size is logical and is used when needed and
shouldn't cause other side effects.
Change-Id: I11949b8bdf16e9b4b8abb1bd633ffa1a1c0b1ad6
CPU BW is set to 200Mhz in QC MTP, since on Pixel, we also adjust CPU BW
in touch PowerHint, we can relax the setting to 100Mhz.
Bug: 69271302
Test: boot
Change-Id: Iead3634d9c6fb0b3edc24ab0a19d62157a6a1793
Unclear if advantages are worth cumulative power draw.
bug 73364974
Test: boot taimen, memlat is powersave
Change-Id: I7b5eb176d0f22281e687b9577f5eedf311fb4a11
All this does is to disable msm_core and set the
polling_interval to 0, which makes the driver useless.
We can achieve the same result by disabling the driver.
Change-Id: Ic19c505ed74811a3d1b76703255af3aa5cb37bf9
Signed-off-by: Davide Garberi <dade.garberi@gmail.com>
Signed-off-by: Subhajeet Muhuri <kenny3fcb@gmail.com>
core_ctl's enable & disable nodes are differnt on different
kernel versions. Fix Disabling of core_ctl for msm8917.
CRs-Fixed: 2366575
Change-Id: Ide7fc5384b34e9e686fe686f9fd70aaaaffcc278
Currently if targets support ESOC there would almost certainly
only be a single instance of an external modem. Hence we can
simplify the esoc_link check accordingly without needing to do
a loop and grep. Choosing the external modem composition simply
depends on whether esoc_name is present.
Change-Id: Ib47e34fd31c3745a0c7b3568968f6f36681c98e7
Those values seem off. CAF maybe messed them up as those values look possibly wrong.
Those values are used as powerhint values on pixel 2 and 3.
Signed-off-by: Dusan Uveric <dusan.uveric9@gmail.com>
* No matter how hard QC tried to improve these features, they still suffer
from stability issues, mainly due to the unpredictable nature of vmpressure
they rely on.
Change-Id: Icd14c79298a3c268abffa06ed17a79dececf423a
Signed-off-by: PIPIPIG233666 <2212848813@qq.com>
* To prevent property name collisions between properties of system and
vendor, 'vendor.' prefix must be added to a vendor HAL service name.
You can see the details in go/treble-sysprop-compatibility documents.
Test: succeeded building and tested on a sailfish device.
Bug: 36796459
Change-Id: I48e6ee0ae3fe401e39efb273256d991fac676357
* This script doesn't do anything useful, since it tries to set a lot of
ro.* properties, which is not allowed anyway.
Change-Id: I408cc17d0d18e81a9cf0e529e6b78622c3017a7f
Signed-off-by: PIPIPIG233666 <2212848813@qq.com>
Move persist entry to fstab and mount at /mnt/vendor/persist
Apply required user, group and permissions once persist
folder is created through __mount and parititon is mounted.
Run restorecon on /mnt/vendor/persist.
Change-Id: I20a16f3669bc7abf9844525c6ba0db1521a5a8e2
* To prevent property name collisions between properties of system and
vendor, 'vendor.' prefix must be added to a vendor HAL service name.
You can see the details in go/treble-sysprop-compatibility documents.
Test: succeeded building and tested on a sailfish device.
Bug: 36796459
Change-Id: I48e6ee0ae3fe401e39efb273256d991fac676357
