CPU BW is set to 200Mhz in QC MTP, since on Pixel, we also adjust CPU BW
in touch PowerHint, we can relax the setting to 100Mhz.
Bug: 69271302
Test: boot
Change-Id: Iead3634d9c6fb0b3edc24ab0a19d62157a6a1793
Unclear if advantages are worth cumulative power draw.
bug 73364974
Test: boot taimen, memlat is powersave
Change-Id: I7b5eb176d0f22281e687b9577f5eedf311fb4a11
All this does is to disable msm_core and set the
polling_interval to 0, which makes the driver useless.
We can achieve the same result by disabling the driver.
Change-Id: Ic19c505ed74811a3d1b76703255af3aa5cb37bf9
Signed-off-by: Davide Garberi <dade.garberi@gmail.com>
Signed-off-by: Subhajeet Muhuri <kenny3fcb@gmail.com>
core_ctl's enable & disable nodes are differnt on different
kernel versions. Fix Disabling of core_ctl for msm8917.
CRs-Fixed: 2366575
Change-Id: Ide7fc5384b34e9e686fe686f9fd70aaaaffcc278
Those values seem off. CAF maybe messed them up as those values look possibly wrong.
Those values are used as powerhint values on pixel 2 and 3.
Signed-off-by: Dusan Uveric <dusan.uveric9@gmail.com>
* No matter how hard QC tried to improve these features, they still suffer
from stability issues, mainly due to the unpredictable nature of vmpressure
they rely on.
Change-Id: Icd14c79298a3c268abffa06ed17a79dececf423a
Signed-off-by: PIPIPIG233666 <2212848813@qq.com>
* To prevent property name collisions between properties of system and
vendor, 'vendor.' prefix must be added to a vendor HAL service name.
You can see the details in go/treble-sysprop-compatibility documents.
Test: succeeded building and tested on a sailfish device.
Bug: 36796459
Change-Id: I48e6ee0ae3fe401e39efb273256d991fac676357
* To prevent property name collisions between properties of system and
vendor, 'vendor.' prefix must be added to a vendor HAL service name.
You can see the details in go/treble-sysprop-compatibility documents.
Test: succeeded building and tested on a sailfish device.
Bug: 36796459
Change-Id: I48e6ee0ae3fe401e39efb273256d991fac676357
